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authorHanhui <sylixos@gmail.com>2019-07-06 07:49:21 (GMT)
committer Hanhui <sylixos@gmail.com>2019-06-19 09:04:04 (GMT)
commit2e021491a30625995217a50130f66fee68195ae9 (patch)
tree5384c6b158ec07e1691b5afe31fb9141c26c2548
parent03404d8e11e2fc7efed84915bf1804c48b87d9b0 (diff)
downloadAIC-OS-2e021491a30625995217a50130f66fee68195ae9.zip
Fixed ARM1176 MMU initialize cache operate bug.
-rw-r--r--SylixOS/arch/arm/mm/cache/armCacheCommonAsm.S12
1 files changed, 12 insertions, 0 deletions
diff --git a/SylixOS/arch/arm/mm/cache/armCacheCommonAsm.S b/SylixOS/arch/arm/mm/cache/armCacheCommonAsm.S
index d169c49..19f60c3 100644
--- a/SylixOS/arch/arm/mm/cache/armCacheCommonAsm.S
+++ b/SylixOS/arch/arm/mm/cache/armCacheCommonAsm.S
@@ -189,9 +189,17 @@ FUNC_DEF(armDCacheInvalidate)
;/*********************************************************************************************************
; 将指定虚拟地址的 DCACHE 回写 R0=void *start; R1=void *end; R2=cache line size
+; MMU 初始化写页表映射关系时也会调用此函数, 此时 CACHE 并未使能, ARM1176 会卡死, 所以这里加入使能判断.
;*********************************************************************************************************/
FUNC_DEF(armDCacheFlush)
+#if __SYLIXOS_ARM_ARCH__ == 6
+ MRC p15, 0, R3, c1, c0, 0
+ AND R3, R3, #P15_R1_C
+ CMP R3, #0
+ BEQ dcache_not_en
+#endif
+
ARM_DSB()
ARM_ISB()
1:
@@ -201,6 +209,10 @@ FUNC_DEF(armDCacheFlush)
BCC 1b
ARM_DSB()
ARM_ISB()
+
+#if __SYLIXOS_ARM_ARCH__ == 6
+LINE_LABEL(dcache_not_en)
+#endif
BX LR
FUNC_END()