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authorJiaojinxing <jiaojinxing1987@gmail.com>2018-04-18 13:37:30 (GMT)
committer Jiaojinxing <jiaojinxing1987@gmail.com>2018-04-18 13:37:30 (GMT)
commit3d0ef698bb0a181c398bdb12c7aced6f6371c587 (patch)
tree6e5dba829fb9f89be941413384abe77f9dc32cd8
parent1676b74c41629956f663d76cff54ad5848a52a72 (diff)
downloadpciutils-master.zip
pciutils-master.tar.gz
pciutils-master.tar.bz2
Fixed "%1$c" style format output.HEADmaster
-rw-r--r--src/ls-caps.c110
-rw-r--r--src/lspci.c4
-rw-r--r--src/lspci.man2
-rw-r--r--src/pci.ids102
-rw-r--r--src/tests/cap-ht99
5 files changed, 231 insertions, 86 deletions
diff --git a/src/ls-caps.c b/src/ls-caps.c
index e74d13a..3135224 100644
--- a/src/ls-caps.c
+++ b/src/ls-caps.c
@@ -231,7 +231,6 @@ cap_ht_pri(struct device *d, int where, int cmd)
{
u16 lctr0, lcnf0, lctr1, lcnf1, eh;
u8 rid, lfrer0, lfcap0, ftr, lfrer1, lfcap1, mbu, mlu, bn;
- char *fmt;
printf("HyperTransport: Slave or Primary Interface\n");
if (verbose < 2)
@@ -243,22 +242,17 @@ cap_ht_pri(struct device *d, int where, int cmd)
if (rid < 0x22 && rid > 0x11)
printf("\t\t!!! Possibly incomplete decoding\n");
- if (rid >= 0x22)
- fmt = "\t\tCommand: BaseUnitID=%u UnitCnt=%u MastHost%c DefDir%c DUL%c\n";
- else
- fmt = "\t\tCommand: BaseUnitID=%u UnitCnt=%u MastHost%c DefDir%c\n";
- printf(fmt,
+ printf("\t\tCommand: BaseUnitID=%u UnitCnt=%u MastHost%c DefDir%c",
(cmd & PCI_HT_PRI_CMD_BUID),
(cmd & PCI_HT_PRI_CMD_UC) >> 5,
FLAG(cmd, PCI_HT_PRI_CMD_MH),
- FLAG(cmd, PCI_HT_PRI_CMD_DD),
- FLAG(cmd, PCI_HT_PRI_CMD_DUL));
- lctr0 = get_conf_word(d, where + PCI_HT_PRI_LCTR0);
+ FLAG(cmd, PCI_HT_PRI_CMD_DD));
if (rid >= 0x22)
- fmt = "\t\tLink Control 0: CFlE%c CST%c CFE%c <LkFail%c Init%c EOC%c TXO%c <CRCErr=%x IsocEn%c LSEn%c ExtCTL%c 64b%c\n";
- else
- fmt = "\t\tLink Control 0: CFlE%c CST%c CFE%c <LkFail%c Init%c EOC%c TXO%c <CRCErr=%x\n";
- printf(fmt,
+ printf(" DUL%c", FLAG(cmd, PCI_HT_PRI_CMD_DUL));
+ printf("\n");
+
+ lctr0 = get_conf_word(d, where + PCI_HT_PRI_LCTR0);
+ printf("\t\tLink Control 0: CFlE%c CST%c CFE%c <LkFail%c Init%c EOC%c TXO%c <CRCErr=%x",
FLAG(lctr0, PCI_HT_LCTR_CFLE),
FLAG(lctr0, PCI_HT_LCTR_CST),
FLAG(lctr0, PCI_HT_LCTR_CFE),
@@ -266,31 +260,35 @@ cap_ht_pri(struct device *d, int where, int cmd)
FLAG(lctr0, PCI_HT_LCTR_INIT),
FLAG(lctr0, PCI_HT_LCTR_EOC),
FLAG(lctr0, PCI_HT_LCTR_TXO),
- (lctr0 & PCI_HT_LCTR_CRCERR) >> 8,
- FLAG(lctr0, PCI_HT_LCTR_ISOCEN),
- FLAG(lctr0, PCI_HT_LCTR_LSEN),
- FLAG(lctr0, PCI_HT_LCTR_EXTCTL),
- FLAG(lctr0, PCI_HT_LCTR_64B));
- lcnf0 = get_conf_word(d, where + PCI_HT_PRI_LCNF0);
+ (lctr0 & PCI_HT_LCTR_CRCERR) >> 8);
if (rid >= 0x22)
- fmt = "\t\tLink Config 0: MLWI=%1$s DwFcIn%5$c MLWO=%2$s DwFcOut%6$c LWI=%3$s DwFcInEn%7$c LWO=%4$s DwFcOutEn%8$c\n";
+ printf(" IsocEn%c LSEn%c ExtCTL%c 64b%c",
+ FLAG(lctr0, PCI_HT_LCTR_ISOCEN),
+ FLAG(lctr0, PCI_HT_LCTR_LSEN),
+ FLAG(lctr0, PCI_HT_LCTR_EXTCTL),
+ FLAG(lctr0, PCI_HT_LCTR_64B));
+ printf("\n");
+
+ lcnf0 = get_conf_word(d, where + PCI_HT_PRI_LCNF0);
+ if (rid < 0x22)
+ printf("\t\tLink Config 0: MLWI=%s MLWO=%s LWI=%s LWO=%s\n",
+ ht_link_width(lcnf0 & PCI_HT_LCNF_MLWI),
+ ht_link_width((lcnf0 & PCI_HT_LCNF_MLWO) >> 4),
+ ht_link_width((lcnf0 & PCI_HT_LCNF_LWI) >> 8),
+ ht_link_width((lcnf0 & PCI_HT_LCNF_LWO) >> 12));
else
- fmt = "\t\tLink Config 0: MLWI=%s MLWO=%s LWI=%s LWO=%s\n";
- printf(fmt,
- ht_link_width(lcnf0 & PCI_HT_LCNF_MLWI),
- ht_link_width((lcnf0 & PCI_HT_LCNF_MLWO) >> 4),
- ht_link_width((lcnf0 & PCI_HT_LCNF_LWI) >> 8),
- ht_link_width((lcnf0 & PCI_HT_LCNF_LWO) >> 12),
- FLAG(lcnf0, PCI_HT_LCNF_DFI),
- FLAG(lcnf0, PCI_HT_LCNF_DFO),
- FLAG(lcnf0, PCI_HT_LCNF_DFIE),
- FLAG(lcnf0, PCI_HT_LCNF_DFOE));
+ printf("\t\tLink Config 0: MLWI=%s DwFcIn%c MLWO=%s DwFcOut%c LWI=%s DwFcInEn%c LWO=%s DwFcOutEn%c\n",
+ ht_link_width(lcnf0 & PCI_HT_LCNF_MLWI),
+ FLAG(lcnf0, PCI_HT_LCNF_DFI),
+ ht_link_width((lcnf0 & PCI_HT_LCNF_MLWO) >> 4),
+ FLAG(lcnf0, PCI_HT_LCNF_DFO),
+ ht_link_width((lcnf0 & PCI_HT_LCNF_LWI) >> 8),
+ FLAG(lcnf0, PCI_HT_LCNF_DFIE),
+ ht_link_width((lcnf0 & PCI_HT_LCNF_LWO) >> 12),
+ FLAG(lcnf0, PCI_HT_LCNF_DFOE));
+
lctr1 = get_conf_word(d, where + PCI_HT_PRI_LCTR1);
- if (rid >= 0x22)
- fmt = "\t\tLink Control 1: CFlE%c CST%c CFE%c <LkFail%c Init%c EOC%c TXO%c <CRCErr=%x IsocEn%c LSEn%c ExtCTL%c 64b%c\n";
- else
- fmt = "\t\tLink Control 1: CFlE%c CST%c CFE%c <LkFail%c Init%c EOC%c TXO%c <CRCErr=%x\n";
- printf(fmt,
+ printf("\t\tLink Control 1: CFlE%c CST%c CFE%c <LkFail%c Init%c EOC%c TXO%c <CRCErr=%x",
FLAG(lctr1, PCI_HT_LCTR_CFLE),
FLAG(lctr1, PCI_HT_LCTR_CST),
FLAG(lctr1, PCI_HT_LCTR_CFE),
@@ -298,29 +296,38 @@ cap_ht_pri(struct device *d, int where, int cmd)
FLAG(lctr1, PCI_HT_LCTR_INIT),
FLAG(lctr1, PCI_HT_LCTR_EOC),
FLAG(lctr1, PCI_HT_LCTR_TXO),
- (lctr1 & PCI_HT_LCTR_CRCERR) >> 8,
+ (lctr1 & PCI_HT_LCTR_CRCERR) >> 8);
+ if (rid >= 0x22)
+ printf(" IsocEn%c LSEn%c ExtCTL%c 64b%c",
FLAG(lctr1, PCI_HT_LCTR_ISOCEN),
FLAG(lctr1, PCI_HT_LCTR_LSEN),
FLAG(lctr1, PCI_HT_LCTR_EXTCTL),
FLAG(lctr1, PCI_HT_LCTR_64B));
+ printf("\n");
+
lcnf1 = get_conf_word(d, where + PCI_HT_PRI_LCNF1);
- if (rid >= 0x22)
- fmt = "\t\tLink Config 1: MLWI=%1$s DwFcIn%5$c MLWO=%2$s DwFcOut%6$c LWI=%3$s DwFcInEn%7$c LWO=%4$s DwFcOutEn%8$c\n";
+ if (rid < 0x22)
+ printf("\t\tLink Config 1: MLWI=%s MLWO=%s LWI=%s LWO=%s\n",
+ ht_link_width(lcnf1 & PCI_HT_LCNF_MLWI),
+ ht_link_width((lcnf1 & PCI_HT_LCNF_MLWO) >> 4),
+ ht_link_width((lcnf1 & PCI_HT_LCNF_LWI) >> 8),
+ ht_link_width((lcnf1 & PCI_HT_LCNF_LWO) >> 12));
else
- fmt = "\t\tLink Config 1: MLWI=%s MLWO=%s LWI=%s LWO=%s\n";
- printf(fmt,
- ht_link_width(lcnf1 & PCI_HT_LCNF_MLWI),
- ht_link_width((lcnf1 & PCI_HT_LCNF_MLWO) >> 4),
- ht_link_width((lcnf1 & PCI_HT_LCNF_LWI) >> 8),
- ht_link_width((lcnf1 & PCI_HT_LCNF_LWO) >> 12),
- FLAG(lcnf1, PCI_HT_LCNF_DFI),
- FLAG(lcnf1, PCI_HT_LCNF_DFO),
- FLAG(lcnf1, PCI_HT_LCNF_DFIE),
- FLAG(lcnf1, PCI_HT_LCNF_DFOE));
+ printf("\t\tLink Config 1: MLWI=%s DwFcIn%c MLWO=%s DwFcOut%c LWI=%s DwFcInEn%c LWO=%s DwFcOutEn%c\n",
+ ht_link_width(lcnf1 & PCI_HT_LCNF_MLWI),
+ FLAG(lcnf1, PCI_HT_LCNF_DFI),
+ ht_link_width((lcnf1 & PCI_HT_LCNF_MLWO) >> 4),
+ FLAG(lcnf1, PCI_HT_LCNF_DFO),
+ ht_link_width((lcnf1 & PCI_HT_LCNF_LWI) >> 8),
+ FLAG(lcnf1, PCI_HT_LCNF_DFIE),
+ ht_link_width((lcnf1 & PCI_HT_LCNF_LWO) >> 12),
+ FLAG(lcnf1, PCI_HT_LCNF_DFOE));
+
printf("\t\tRevision ID: %u.%02u\n",
(rid & PCI_HT_RID_MAJ) >> 5, (rid & PCI_HT_RID_MIN));
if (rid < 0x22)
return;
+
lfrer0 = get_conf_byte(d, where + PCI_HT_PRI_LFRER0);
printf("\t\tLink Frequency 0: %s\n", ht_link_freq(lfrer0 & PCI_HT_LFRER_FREQ));
printf("\t\tLink Error 0: <Prot%c <Ovfl%c <EOC%c CTLTm%c\n",
@@ -328,6 +335,7 @@ cap_ht_pri(struct device *d, int where, int cmd)
FLAG(lfrer0, PCI_HT_LFRER_OV),
FLAG(lfrer0, PCI_HT_LFRER_EOC),
FLAG(lfrer0, PCI_HT_LFRER_CTLT));
+
lfcap0 = get_conf_byte(d, where + PCI_HT_PRI_LFCAP0);
printf("\t\tLink Frequency Capability 0: 200MHz%c 300MHz%c 400MHz%c 500MHz%c 600MHz%c 800MHz%c 1.0GHz%c 1.2GHz%c 1.4GHz%c 1.6GHz%c Vend%c\n",
FLAG(lfcap0, PCI_HT_LFCAP_200),
@@ -341,6 +349,7 @@ cap_ht_pri(struct device *d, int where, int cmd)
FLAG(lfcap0, PCI_HT_LFCAP_1400),
FLAG(lfcap0, PCI_HT_LFCAP_1600),
FLAG(lfcap0, PCI_HT_LFCAP_VEND));
+
ftr = get_conf_byte(d, where + PCI_HT_PRI_FTR);
printf("\t\tFeature Capability: IsocFC%c LDTSTOP%c CRCTM%c ECTLT%c 64bA%c UIDRD%c\n",
FLAG(ftr, PCI_HT_FTR_ISOCFC),
@@ -349,6 +358,7 @@ cap_ht_pri(struct device *d, int where, int cmd)
FLAG(ftr, PCI_HT_FTR_ECTLT),
FLAG(ftr, PCI_HT_FTR_64BA),
FLAG(ftr, PCI_HT_FTR_UIDRD));
+
lfrer1 = get_conf_byte(d, where + PCI_HT_PRI_LFRER1);
printf("\t\tLink Frequency 1: %s\n", ht_link_freq(lfrer1 & PCI_HT_LFRER_FREQ));
printf("\t\tLink Error 1: <Prot%c <Ovfl%c <EOC%c CTLTm%c\n",
@@ -356,6 +366,7 @@ cap_ht_pri(struct device *d, int where, int cmd)
FLAG(lfrer1, PCI_HT_LFRER_OV),
FLAG(lfrer1, PCI_HT_LFRER_EOC),
FLAG(lfrer1, PCI_HT_LFRER_CTLT));
+
lfcap1 = get_conf_byte(d, where + PCI_HT_PRI_LFCAP1);
printf("\t\tLink Frequency Capability 1: 200MHz%c 300MHz%c 400MHz%c 500MHz%c 600MHz%c 800MHz%c 1.0GHz%c 1.2GHz%c 1.4GHz%c 1.6GHz%c Vend%c\n",
FLAG(lfcap1, PCI_HT_LFCAP_200),
@@ -369,6 +380,7 @@ cap_ht_pri(struct device *d, int where, int cmd)
FLAG(lfcap1, PCI_HT_LFCAP_1400),
FLAG(lfcap1, PCI_HT_LFCAP_1600),
FLAG(lfcap1, PCI_HT_LFCAP_VEND));
+
eh = get_conf_word(d, where + PCI_HT_PRI_EH);
printf("\t\tError Handling: PFlE%c OFlE%c PFE%c OFE%c EOCFE%c RFE%c CRCFE%c SERRFE%c CF%c RE%c PNFE%c ONFE%c EOCNFE%c RNFE%c CRCNFE%c SERRNFE%c\n",
FLAG(eh, PCI_HT_EH_PFLE),
@@ -387,9 +399,11 @@ cap_ht_pri(struct device *d, int where, int cmd)
FLAG(eh, PCI_HT_EH_RNFE),
FLAG(eh, PCI_HT_EH_CRCNFE),
FLAG(eh, PCI_HT_EH_SERRNFE));
+
mbu = get_conf_byte(d, where + PCI_HT_PRI_MBU);
mlu = get_conf_byte(d, where + PCI_HT_PRI_MLU);
printf("\t\tPrefetchable memory behind bridge Upper: %02x-%02x\n", mbu, mlu);
+
bn = get_conf_byte(d, where + PCI_HT_PRI_BN);
printf("\t\tBus Number: %02x\n", bn);
}
diff --git a/src/lspci.c b/src/lspci.c
index b50c76a..748452c 100644
--- a/src/lspci.c
+++ b/src/lspci.c
@@ -315,6 +315,8 @@ show_terse(struct device *d)
word subsys_v, subsys_d;
char ssnamebuf[256];
+ pci_fill_info(p, PCI_FILL_LABEL);
+
if (p->label)
printf("\tDeviceName: %s", p->label);
get_subid(d, &subsys_v, &subsys_d);
@@ -683,7 +685,7 @@ show_verbose(struct device *d)
show_terse(d);
pci_fill_info(p, PCI_FILL_IRQ | PCI_FILL_BASES | PCI_FILL_ROM_BASE | PCI_FILL_SIZES |
- PCI_FILL_PHYS_SLOT | PCI_FILL_LABEL | PCI_FILL_NUMA_NODE);
+ PCI_FILL_PHYS_SLOT | PCI_FILL_NUMA_NODE);
irq = p->irq;
switch (htype)
diff --git a/src/lspci.man b/src/lspci.man
index 9348cfc..35b3620 100644
--- a/src/lspci.man
+++ b/src/lspci.man
@@ -325,7 +325,7 @@ in a single record. Please avoid using this format in any new code.
.TP
.B @IDSDIR@/pci.ids
A list of all known PCI ID's (vendors, devices, classes and subclasses). Maintained
-at http://pciids.sourceforge.net/, use the
+at http://pci-ids.ucw.cz/, use the
.B update-pciids
utility to download the most recent version.
.TP
diff --git a/src/pci.ids b/src/pci.ids
index 3cd5f8b..d5bbcf4 100644
--- a/src/pci.ids
+++ b/src/pci.ids
@@ -1,8 +1,8 @@
#
# List of PCI ID's
#
-# Version: 2018.03.15
-# Date: 2018-03-15 03:15:02
+# Version: 2018.04.06
+# Date: 2018-04-06 03:15:02
#
# Maintained by Albert Pool, Martin Mares, and other volunteers from
# the PCI ID Project at http://pci-ids.ucw.cz/.
@@ -35,7 +35,6 @@
7a08 SATA AHCI Controller
7a0f DMA (Direct Memory Access) Controller
7a14 EHCI USB Controller
- 7a15 GPU (Graphics Processing Unit)
7a24 OHCI USB Controller
001c PEAK-System Technik GmbH
0001 PCAN-PCI CAN-Bus controller
@@ -421,6 +420,7 @@
17aa 1052 ThinkServer RAID 720i
17aa 1053 ThinkServer RAID 720ix
1d49 0600 ThinkSystem RAID 730-8i 1GB Cache PCIe 12Gb Adapter
+ 1d49 0609 ThinkSystem RAID 730-8i 4GB Flash PCIe 12Gb Adapter
8086 351e RMS3CC080 RAID Controller
8086 351f RMS3CC040 RAID Controller
8086 9360 RS3DC080 RAID Controller
@@ -858,7 +858,7 @@
434d IXP AC'97 Modem
4353 SMBus
4354 215CT [Mach64 CT PCI]
- 4358 210888CX [Mach64 CX]
+ 4358 Mach64 CX [Graphics Xpression]
4361 IXP SB300 AC'97 Audio Controller
4363 SMBus
436e 436E Serial ATA Controller
@@ -1059,7 +1059,7 @@
4437 RS250 [Mobility Radeon 7000 IGP]
4554 210888ET [Mach64 ET]
4654 Mach64 VT
- 4742 3D Rage PRO AGP 2X
+ 4742 Rage 3 [3D Rage PRO AGP 2X]
1002 0040 Rage Pro Turbo AGP 2X
1002 0044 Rage Pro Turbo AGP 2X
1002 0061 Rage Pro AIW AGP 2X
@@ -1075,7 +1075,7 @@
1028 c082 Rage Pro Turbo AGP 2X
8086 4152 Xpert 98D AGP 2X
8086 464a Rage Pro Turbo AGP 2X
- 4744 3D Rage PRO AGP 1X
+ 4744 Rage 3 [3D Rage PRO AGP 1X]
1002 4744 Rage Pro Turbo AGP
8086 4d55 Rage 3D Pro AGP 1X [Intel MU440EX]
4749 3D Rage PRO PCI
@@ -1099,7 +1099,7 @@
1002 0080 Rage Pro Turbo
1002 0084 Rage Pro Turbo
1002 4750 Rage Pro Turbo
- 4752 Rage XL PCI
+ 4752 Rage 3 [Rage XL PCI]
0e11 001e Proliant Rage XL
1002 0008 Rage XL
1002 4752 Proliant Rage XL
@@ -1121,19 +1121,19 @@
8086 5744 S845WD1-E mainboard
4753 Rage XC
1002 4753 Rage XC
- 4754 3D Rage II/II+ PCI [Mach64 GT]
- 4755 Mach64 GTB [3D Rage II+ DVD]
- 4756 3D Rage IIC PCI [Mach64 GT IIC]
+ 4754 Mach64 GT/GT-B [3D Rage I/II]
+ 4755 Mach64 GT-B [3D Rage II+ DVD]
+ 4756 Rage 2 [3D Rage IIC PCI]
1002 4756 Rage IIC
- 4757 3D Rage IIC AGP
+ 4757 Rage 2 [3D Rage IIC AGP]
1002 4757 Rage IIC AGP
1028 0089 Rage 3D IIC
1028 008e PowerEdge 1300 onboard video
1028 4082 Rage 3D IIC
1028 8082 Rage 3D IIC
1028 c082 Rage 3D IIC
- 4758 210888GX [Mach64 GX PCI]
- 4759 3D Rage IIC PCI
+ 4758 Mach64 GX [WinTurbo]
+ 4759 Rage 3 [3D Rage IIC PCI]
475a 3D Rage IIC AGP
1002 0084 Rage 3D Pro AGP 2x XPERT 98
1002 0087 Rage 3D IIC
@@ -1169,7 +1169,7 @@
4b69 R481 [Radeon X850 XT AGP] (Secondary)
4b6b R481 [Radeon X850 PRO AGP] (Secondary)
4b6c R481 [Radeon X850 XT Platinum Edition AGP] (Secondary)
- 4c42 3D Rage LT PRO AGP 2X
+ 4c42 Mach64 LT [3D Rage LT PRO AGP]
0e11 b0e7 Rage LT Pro (Compaq Presario 5240)
0e11 b0e8 Rage 3D LT Pro
0e11 b10e 3D Rage LT Pro (Compaq Armada 1750)
@@ -1197,7 +1197,7 @@
1028 00bb Latitude CPx
1179 ff00 Satellite 1715XCDS laptop
13bd 1019 PC-AR10
- 4c50 3D Rage LT PRO PCI
+ 4c50 Rage 3 LT [3D Rage LT PRO PCI]
1002 4c50 Rage LT Pro
4c52 Rage Mobility-M1 PCI
1033 8112 Versa Note VXi
@@ -1267,7 +1267,7 @@
5044 All-In-Wonder 128 PCI
1002 0028 Rage 128 AIW
1002 0029 Rage 128 AIW
- 5046 Rage 128 PRO AGP 4x TMDS
+ 5046 Rage 4 [Rage 128 PRO AGP 4X TMDS]
1002 0004 Rage Fury Pro
1002 0008 Rage Fury Pro/Xpert 2000 Pro
1002 0014 Rage Fury Pro
@@ -1367,7 +1367,7 @@
1002 0028 Rage 128 AIW
1002 0029 Rage 128 AIW
1002 0068 Rage 128 AIW
- 5246 Rage Fury/Xpert 128/Xpert 2000 AGP 2x
+ 5246 Rage 4 [Rage Fury/Xpert 128/Xpert 2000 AGP]
1002 0004 Magnum/Xpert 128/Xpert 99
1002 0008 Magnum/Xpert128/X99/Xpert2000
1002 0028 Rage 128 AIW AGP
@@ -1425,10 +1425,10 @@
5653 RV410/M26 [Mobility Radeon X700]
1025 0080 Aspire 5024WLMi
103c 0940 Compaq NW8240 Mobile Workstation
- 5654 264VT [Mach64 VT]
+ 5654 Mach64 VT [Video Xpression]
1002 5654 Mach64VT Reference
5655 264VT3 [Mach64 VT3]
- 5656 264VT4 [Mach64 VT4]
+ 5656 Mach64 VT4 [Video Xpression+]
5657 RV410 [Radeon X550 XTX / X700]
5830 RS300 Host Bridge
5831 RS300 Host Bridge
@@ -1707,6 +1707,12 @@
17aa 368f Radeon R5 A230
6667 Jet ULT [Radeon R5 M230]
666f Sun LE [Radeon HD 8550M / R5 M230]
+ 66a0 Vega 20
+ 66a1 Vega 20
+ 66a2 Vega 20
+ 66a3 Vega 20
+ 66a7 Vega 20
+ 66af Vega 20
6704 Cayman PRO GL [FirePro V7900]
6707 Cayman LE GL [FirePro V5900]
6718 Cayman XT [Radeon HD 6970]
@@ -3534,6 +3540,7 @@
17aa 5113 Radeon R6 Graphics
17aa 5116 Radeon R6 Graphics
17aa 5118 Radeon R5 Graphics
+ 98e4 Radeon R2 Graphics
9900 Trinity [Radeon HD 7660G]
103c 1985 Pavilion 17-e163sg Notebook PC
# AMD A10-5800K CPU
@@ -4779,6 +4786,7 @@
102b 0f83 Millennium G550
102b 0f84 Millennium G550 Dual Head DDR 32Mb
102b 1e41 Millennium G550
+ 102b 22c0 G550 PCIe
102b 2300 Millennium G550 LP PCIE
2537 Millennium P650/P750
102b 1820 Millennium P750 64MB
@@ -6390,7 +6398,7 @@
1077 0007 QLogic 2x1GE+2x10GE QL41264HMCU CNA
1077 0009 QLogic 2x1GE+2x10GE QL41162HMRJ CNA
1077 000b 25GE 2P QL41262HxCU-DE Adapter
- 1077 0011 FastLinQ QL41212H 25GbE Adapter
+ 1077 0011 FastLinQ QL41212HLCU 25GbE Adapter
1077 0012 FastLinQ QL41112H 10GbE Adapter
1077 0039 QLogic QL41262 PCIe 25Gb 2-Port SFP28 Ethernet Adapter
1590 021d 10/25GbE 2P QL41222HLCU-HP Adapter
@@ -8334,8 +8342,10 @@
0100 Lightning 1200
10dd 0023 Lightning 1200 15+16M
10de NVIDIA Corporation
- 0008 NV1 [EDGE 3D]
- 0009 NV1 [EDGE 3D]
+ 0008 NV1 [STG2000X-B Series]
+ 0009 NV1 [NV1 Series]
+ 0018 NV3 [Riva 128]
+ 0019 NV3 [Riva 128ZX]
0020 NV4 [Riva TNT]
1043 0200 V3400 TNT
1048 0c18 Erazor II SGRAM
@@ -8606,7 +8616,7 @@
0098 G70M [GeForce Go 7800]
0099 G70M [GeForce Go 7800 GTX]
009d G70GL [Quadro FX 4500]
- 00a0 NV5 [Aladdin TNT2]
+ 00a0 NV0A [Aladdin TNT2 IGP]
14af 5810 Maxi Gamer Xentor
00c0 NV41 [GeForce 6800 GS]
00c1 NV41 [GeForce 6800]
@@ -8702,16 +8712,16 @@
00f5 G71 [GeForce 7800 GS]
00f6 NV43 [GeForce 6800 GS/XT]
1682 217e XFX GeForce 6800 XTreme 256MB DDR3 AGP
- 00f8 NV40GL [Quadro FX 3400/4400]
+ 00f8 NV45GL [Quadro FX 3400/4400]
00f9 NV40 [GeForce 6800 GT/GTO/Ultra]
10de 00f9 NV40 [GeForce 6800 GT]
1682 2120 GEFORCE 6800 GT PCI-E
- 00fa NV36 [GeForce PCX 5750]
- 00fb NV38 [GeForce PCX 5900]
+ 00fa NV39 [GeForce PCX 5750]
+ 00fb NV35 [GeForce PCX 5900]
00fc NV37GL [Quadro FX 330/GeForce PCX 5300]
00fd NV37GL [Quadro PCI-E Series]
00fe NV38GL [Quadro FX 1300]
- 00ff NV18 [GeForce PCX 4300]
+ 00ff NV19 [GeForce PCX 4300]
0100 NV10 [GeForce 256 SDR]
1043 0200 AGP-V6600 SGRAM
1043 0201 AGP-V6600 SDRAM
@@ -11065,6 +11075,7 @@
1b01 GP102
1b02 GP102 [TITAN Xp]
1b06 GP102 [GeForce GTX 1080 Ti]
+ 1b07 GP102 [P102-100]
1b30 GP102GL [Quadro P6000]
1b38 GP102GL [Tesla P40]
1b70 GP102GL
@@ -11135,8 +11146,12 @@
1d72 1701 Mi Notebook Pro [GeForce MX150]
1d33 GP108GL [Quadro P500]
1d81 GV100 [TITAN V]
- 1db1 GV100GL [Tesla V100 SXM2]
- 1db4 GV100GL [Tesla V100 PCIe]
+ 1db1 GV100GL [Tesla V100 SXM2 16GB]
+ 1db4 GV100GL [Tesla V100 PCIe 16GB]
+ 1db5 GV100GL [Tesla V100 SXM2 32GB]
+ 1db6 GV100GL [Tesla V100 PCIe 32GB]
+ 1db7 GV100GL [Tesla V100 DGXS 32GB]
+ 1dba GV100GL [Quadro GV100]
10df Emulex Corporation
0720 OneConnect NIC (Skyhawk)
103c 1934 FlexFabric 20Gb 2-port 650M Adapter
@@ -14274,10 +14289,11 @@
7384 PM7384 [FREEDM - 84P672 Frm Engine & Datalink Mgr]
8000 PM8000 [SPC - SAS Protocol Controller]
8009 PM8009 SPCve 8x6G
- 8032 ATTO Celerity FC8xEN
+ 8032 PM8032 Tachyon QE8
117c 003a Celerity FC-81EN Fibre Channel Adapter
117c 003b Celerity FC-82EN Fibre Channel Adapter
117c 003c Celerity FC-84EN Fibre Channel Adapter
+ 117c 403b ThunderLink FC 1082 Fibre Channel Adapter
8053 PM8053 SXP 12G 24-port SAS/SATA expander
8054 PM8054 SXP 12G 36-port SAS/SATA expander
8055 PM8055 SXP 12G 48-port SAS/SATA expander
@@ -14570,7 +14586,8 @@
0d13 Desktop PCI L1/L3 Telephony
1232 GPT Limited
1233 Bus-Tech, Inc.
-1235 Risq Modular Systems, Inc.
+# nee Risq Modular Systems, Inc.
+1235 SMART Modular Technologies
1236 Sigma Designs Corporation
0000 RealMagic64/GX
6401 REALmagic 64/GX (SD 6425)
@@ -18735,10 +18752,8 @@
020f MT28908A0 Family [ConnectX-6 Flash Recovery]
0210 MT28908A0 Family [ConnectX-6 Secure Flash Recovery]
0211 MT416842 Family [BlueField SoC Flash Recovery]
-# reserved for RM#105916
024e MT53100 [Spectrum-2, Flash recovery mode]
-# Actual value to be used
- 024f MT53100 [Spectrum-2, Flash recovery mode]
+ 024f MT53100 [Spectrum-2, Secure Flash recovery mode]
0262 MT27710 [ConnectX-4 Lx Programmable] EN
0263 MT27710 [ConnectX-4 Lx Programmable Virtual Function] EN
0264 Innova-2 Flex Burn image
@@ -20796,6 +20811,7 @@
1a4a SLAC National Accelerator Lab TID-AIR
1000 MCOR Power Supply Controller
1010 AMC EVR - Stockholm Timing Board
+ 1020 Cluster On Board (COB) Ethernet Switch
2000 PGPCard - 4 Lane
2001 PGPCard - 8 Lane Plus EVR
2010 PCI-Express EVR
@@ -20961,6 +20977,7 @@
1849 1080 Motherboard
1142 ASM1042A USB 3.0 Host Controller
1242 ASM1142 USB 3.1 Host Controller
+ 1343 ASM1143 USB 3.1 Host Controller
1b2c Opal-RT Technologies Inc.
1b36 Red Hat, Inc.
0001 QEMU PCI-PCI bridge
@@ -21047,7 +21064,7 @@
e5f4 MPEG2 and H264 Encoder-Transcoder
f1c4 Dual ASI-RX/TX-CI card
1b66 DELTACAST
- 0007 Multiple products
+ 0007 DELTA-3G-elp-d
1b6f Etron Technology, Inc.
7023 EJ168 USB 3.0 Host Controller
7052 EJ188/EJ198 USB 3.0 Host Controller
@@ -24076,6 +24093,7 @@
1059 0150 RD-01068 10GbE interface
15ab Ethernet Connection X552 10 GbE Backplane
15ac Ethernet Connection X552 10 GbE SFP+
+ 1059 0160 RD-01167 10GbE interface
15ad Ethernet Connection X552/X557-AT 10GBASE-T
15ae Ethernet Connection X552 1000BASE-T
15b0 Ethernet Connection X552 Backplane
@@ -28931,6 +28949,7 @@
17aa 382a B51-80 Laptop
9d48 Sunrise Point-LP LPC Controller
1028 06f3 Latitude 3570
+ 9d4e Intel(R) 100 Series Chipset Family LPC Controller/eSPI Controller - 9D4E
9d56 Sunrise Point-LP LPC Controller
9d58 Sunrise Point-LP LPC Controller
17aa 2247 ThinkPad T570
@@ -30029,6 +30048,14 @@ C 00 Unclassified device
C 01 Mass storage controller
00 SCSI storage controller
01 IDE interface
+ 00 ISA Compatibility mode-only controller
+ 05 PCI native mode-only controller
+ 0a ISA Compatibility mode controller, supports both channels switched to PCI native mode
+ 0f PCI native mode controller, supports both channels switched to ISA compatibility mode
+ 80 ISA Compatibility mode-only controller, supports bus mastering
+ 85 PCI native mode-only controller, supports bus mastering
+ 8a ISA Compatibility mode controller, supports both channels switched to PCI native mode, supports bus mastering
+ 8f PCI native mode controller, supports both channels switched to ISA compatibility mode, supports bus mastering
02 Floppy disk controller
03 IPI bus controller
04 RAID bus controller
@@ -30176,7 +30203,10 @@ C 0c Serial bus controller
04 Fibre Channel
05 SMBus
06 InfiniBand
- 07 IPMI SMIC interface
+ 07 IPMI Interface
+ 00 SMIC
+ 01 KCS
+ 02 BT (Block Transfer)
08 SERCOS interface
09 CANBUS
C 0d Wireless controller
diff --git a/src/tests/cap-ht b/src/tests/cap-ht
new file mode 100644
index 0000000..5817447
--- /dev/null
+++ b/src/tests/cap-ht
@@ -0,0 +1,99 @@
+00:00.0 Host bridge: Advanced Micro Devices, Inc. [AMD/ATI] RD890 PCI to PCI bridge (external gfx0 port A) (rev 02)
+ Subsystem: Super Micro Computer Inc Device a711
+ Control: I/O- Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ >SERR- <PERR- INTx-
+ Capabilities: [f0] HyperTransport: MSI Mapping Enable+ Fixed+
+ Capabilities: [c4] HyperTransport: Slave or Primary Interface
+ Command: BaseUnitID=0 UnitCnt=20 MastHost- DefDir- DUL-
+ Link Control 0: CFlE- CST- CFE- <LkFail- Init+ EOC- TXO- <CRCErr=0 IsocEn- LSEn- ExtCTL- 64b-
+ Link Config 0: MLWI=16bit DwFcIn- MLWO=16bit DwFcOut- LWI=16bit DwFcInEn- LWO=16bit DwFcOutEn-
+ Link Control 1: CFlE- CST- CFE- <LkFail+ Init- EOC+ TXO+ <CRCErr=0 IsocEn- LSEn- ExtCTL- 64b-
+ Link Config 1: MLWI=8bit DwFcIn- MLWO=8bit DwFcOut- LWI=8bit DwFcInEn- LWO=8bit DwFcOutEn-
+ Revision ID: 3.00
+ Link Frequency 0: [e]
+ Link Error 0: <Prot- <Ovfl- <EOC- CTLTm-
+ Link Frequency Capability 0: 200MHz+ 300MHz- 400MHz+ 500MHz- 600MHz+ 800MHz+ 1.0GHz+ 1.2GHz+ 1.4GHz- 1.6GHz- Vend-
+ Feature Capability: IsocFC+ LDTSTOP+ CRCTM- ECTLT- 64bA+ UIDRD-
+ Link Frequency 1: 200MHz
+ Link Error 1: <Prot- <Ovfl- <EOC- CTLTm-
+ Link Frequency Capability 1: 200MHz- 300MHz- 400MHz- 500MHz- 600MHz- 800MHz- 1.0GHz- 1.2GHz- 1.4GHz- 1.6GHz- Vend-
+ Error Handling: PFlE- OFlE- PFE- OFE- EOCFE- RFE- CRCFE- SERRFE- CF- RE- PNFE- ONFE- EOCNFE- RNFE- CRCNFE- SERRNFE-
+ Prefetchable memory behind bridge Upper: 00-00
+ Bus Number: 00
+ Capabilities: [40] HyperTransport: Retry Mode
+ Capabilities: [54] HyperTransport: UnitID Clumping
+ Capabilities: [9c] HyperTransport: #1a
+ Capabilities: [70] MSI: Enable- Count=1/4 Maskable- 64bit-
+ Address: 00000000 Data: 0000
+00: 02 10 13 5a 02 00 10 20 02 00 00 06 00 00 80 00
+10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+20: 00 00 00 00 00 00 00 00 00 00 00 00 d9 15 11 a7
+30: 00 00 00 00 f0 00 00 00 00 00 00 00 00 00 00 00
+40: 08 54 00 c0 c1 00 00 00 00 00 00 00 42 27 05 00
+50: d9 15 11 a7 08 9c 00 90 08 10 00 00 08 10 00 00
+60: 3c 00 00 00 00 00 00 00 00 00 00 40 63 4e 00 78
+70: 05 00 04 00 00 00 00 00 00 00 00 00 00 00 00 00
+80: 00 00 00 00 10 00 00 03 20 02 30 00 31 20 00 c0
+90: 00 00 00 e0 00 00 00 00 10 0d 00 00 08 70 3c d0
+a0: 66 00 00 00 00 00 00 83 00 00 00 00 79 41 00 00
+b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+c0: 00 00 00 80 08 40 80 02 20 00 11 11 d0 00 00 00
+d0: 60 0e f5 7f 13 00 00 00 00 00 00 00 00 00 00 00
+e0: 00 00 05 00 ff ff ff ff 00 00 00 00 00 00 00 00
+f0: 08 c4 03 a8 00 80 80 00 01 00 00 00 08 00 c2 fe
+
+00:18.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 15h Processor Function 0
+ Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
+ Capabilities: [80] HyperTransport: Host or Secondary Interface
+ Command: WarmRst+ DblEnd- DevNum=0 ChainSide- HostHide+ Slave- <EOCErr- DUL-
+ Link Control: CFlE- CST- CFE- <LkFail- Init- EOC+ TXO+ <CRCErr=0 IsocEn- LSEn- ExtCTL- 64b-
+ Link Config: MLWI=8bit DwFcIn- MLWO=8bit DwFcOut- LWI=N/C DwFcInEn- LWO=N/C DwFcOutEn-
+ Revision ID: 3.00
+ Link Frequency: 200MHz
+ Link Error: <Prot- <Ovfl- <EOC- CTLTm-
+ Link Frequency Capability: 200MHz+ 300MHz- 400MHz+ 500MHz- 600MHz+ 800MHz+ 1.0GHz+ 1.2GHz+ 1.4GHz- 1.6GHz- Vend-
+ Feature Capability: IsocFC+ LDTSTOP+ CRCTM- ECTLT- 64bA+ UIDRD- ExtRS- UCnfE-
+ Capabilities: [a0] HyperTransport: Host or Secondary Interface
+ Command: WarmRst+ DblEnd- DevNum=0 ChainSide- HostHide+ Slave- <EOCErr- DUL-
+ Link Control: CFlE- CST- CFE- <LkFail- Init- EOC+ TXO+ <CRCErr=0 IsocEn- LSEn- ExtCTL- 64b-
+ Link Config: MLWI=8bit DwFcIn- MLWO=8bit DwFcOut- LWI=N/C DwFcInEn- LWO=N/C DwFcOutEn-
+ Revision ID: 3.00
+ Link Frequency: 200MHz
+ Link Error: <Prot- <Ovfl- <EOC- CTLTm-
+ Link Frequency Capability: 200MHz+ 300MHz- 400MHz+ 500MHz- 600MHz+ 800MHz+ 1.0GHz+ 1.2GHz+ 1.4GHz- 1.6GHz- Vend-
+ Feature Capability: IsocFC+ LDTSTOP+ CRCTM- ECTLT- 64bA+ UIDRD- ExtRS- UCnfE-
+ Capabilities: [c0] HyperTransport: Host or Secondary Interface
+ Command: WarmRst+ DblEnd- DevNum=0 ChainSide- HostHide+ Slave- <EOCErr- DUL-
+ Link Control: CFlE- CST- CFE- <LkFail- Init+ EOC- TXO- <CRCErr=0 IsocEn- LSEn+ ExtCTL- 64b-
+ Link Config: MLWI=16bit DwFcIn- MLWO=16bit DwFcOut- LWI=16bit DwFcInEn- LWO=16bit DwFcOutEn-
+ Revision ID: 3.00
+ Link Frequency: 500MHz
+ Link Error: <Prot- <Ovfl- <EOC- CTLTm-
+ Link Frequency Capability: 200MHz+ 300MHz- 400MHz+ 500MHz- 600MHz+ 800MHz+ 1.0GHz+ 1.2GHz+ 1.4GHz- 1.6GHz- Vend-
+ Feature Capability: IsocFC+ LDTSTOP+ CRCTM- ECTLT- 64bA+ UIDRD- ExtRS- UCnfE-
+ Capabilities: [e0] HyperTransport: Host or Secondary Interface
+ Command: WarmRst+ DblEnd- DevNum=0 ChainSide- HostHide+ Slave- <EOCErr- DUL-
+ Link Control: CFlE- CST- CFE- <LkFail- Init+ EOC- TXO- <CRCErr=0 IsocEn- LSEn+ ExtCTL- 64b-
+ Link Config: MLWI=16bit DwFcIn- MLWO=16bit DwFcOut- LWI=16bit DwFcInEn- LWO=16bit DwFcOutEn-
+ Revision ID: 3.00
+ Link Frequency: [e]
+ Link Error: <Prot- <Ovfl- <EOC- CTLTm-
+ Link Frequency Capability: 200MHz+ 300MHz- 400MHz+ 500MHz- 600MHz+ 800MHz+ 1.0GHz+ 1.2GHz+ 1.4GHz- 1.6GHz- Vend-
+ Feature Capability: IsocFC+ LDTSTOP+ CRCTM- ECTLT- 64bA+ UIDRD- ExtRS- UCnfE-
+00: 22 10 00 16 00 00 10 00 00 00 00 06 00 00 80 00
+10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+30: 00 00 00 00 80 00 00 00 00 00 00 00 00 00 00 00
+40: 01 02 24 00 08 10 04 00 01 02 04 00 01 02 04 00
+50: 01 02 04 00 01 02 04 00 01 02 04 00 01 02 04 00
+60: 10 00 0f 00 e0 03 00 00 00 b8 4e 02 10 0e 80 00
+70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+80: 08 a0 01 21 c0 00 00 77 60 00 f5 ff 13 00 00 00
+90: 00 00 00 00 00 00 00 00 00 00 00 00 0e 00 00 00
+a0: 08 c0 01 21 c0 00 00 77 60 00 f5 ff 13 00 00 00
+b0: 00 00 00 00 00 00 00 00 00 00 00 00 0e 00 00 00
+c0: 08 e0 01 21 20 20 11 11 60 03 f5 ff 13 00 00 00
+d0: 48 49 8f 80 00 00 01 00 03 00 00 00 0f 00 00 00
+e0: 08 00 01 21 20 20 11 11 60 0e f5 ff 13 00 00 00
+f0: ee 02 84 80 00 00 01 00 07 00 00 00 0e 00 00 00